Autore
PIERFRANCESCO FOGLIA
Unimap Dati autore
- Ricercatore Universitario presso Dipartimento di Ingegneria dell' Informazione: Elettronica, Informatica, Telecomunicazioni
- Membro della Facolta' di Ingegneria
- Settore scientifico disciplinare ING-INF/05 SISTEMI DI ELABORAZIONE DELLE INFORMAZIONI
- In servizio
Prodotti
- Articoli
- MPEG Video Traffic on a MetaRing Network: Complexity Reduction of a ‘Worst-Case’ Model for Bandwidth Allocation Analysis 1998
- An algorithm for the Classification of Coherence Related Overhead in Shared-Bus Shared-Memory Multiprocessors 2001
- Fine-Grain Design Space Exploration for a Cartographic SoC Multiprocessor 2003
- MEDEA Workshop Guests Editor's Introduction 2003
- A Simulation Study of Memory Performance of SMP Multiprocessors Running a TPC-W Workload 2004
- MEDEA Workshop Guests Editor's Introduction 2004
- Speeding-up multiprocessors running DBMS workloads through coherence protocol 2004
- A Cache Design for High Performance Embedded Systems 2005
- Medea 2004 Workshop: Guest editors' Introduction 2005
- Reducing coherence overhead and boosting performance of high-end SMP multiprocessors running a DSS workload 2005
- An ESB Implementation for Airport Environment 2006
- Analysis of Embedded Video Coder System: a System Level Approach 2006
- Embedded Processors and Systems: Architectural Issues and Solutions for Emerging Applications 2006
- Memory Performance: Dealing with Applications, Systems and Architecture 2006
- Assisting E-Government Users with Animated Talking Faces 2007
- Improving power efficiency of D-NUCA caches 2007
- MEmory performance: DEaling with applications, systems and architecture 2007
- Impact of on-chip network parameters on nuca cache performances 2009
- Way-Adaptable D-Nuca Caches 2010
- 8th IEEE MEDEA Worshop 2011
- A Real-Time Configurable NURBS Interpolator with Bounded Acceleration, Jerk and Chord Error 2012
- Atti, Riassunti o Comunicazioni
- Bus Utilization Analysis of Multithreaded Shared-Bud Multiprocessor: Initial Results 1997
- Analysis of Sharing Overhead in Shared Memory Multiprocessors 1998
- Process Migration Effects on Memory Performance Multiprocessor Web-Servers 1999
- Performance Analysis of Electronic Commerce Multiprocessor Servers 2000
- Adapting DSS Workloads through Coherence Protocols 2001
- Evaluating Optimizations for Multiprocessors E-Commerce Server Running TPC-W Workload 2001
- Extension of Web Server Systems for E-Commerce: Incremental Crowding vs. Functional Doubling-Up 2001
- OS Effects on Memory Hierarchy of a SMP Multiprocessor Running a DBMS Workload 2001
- Performance Analysis of Parallel Applications Running on SMP 2001
- Boosting the Performance of Three-Tier Web Servers Deploying SMP Architecture 2002
- Use of a CORBA/RMI Gateway: Characterization of Communication Overhead 2002
- Extending SNMP Management to GSM Radio Devices 2003
- Speeding-up Multiprocessors Running DSS Workloads through Coherence Protocols 2003
- A NUCA model for embedded systems cache design 2005
- An Innovative Tool to Easily Get Usable Web Sites 2005
- Analysis of Embedded Video Coder Systems: a System Level Approach 2005
- Easily Usable Web Sites, the path to a high conversion rate 2005
- Tuning D-Nuca Cache 2005
- An Analysis of User Interface Factors influencing the Acceptance of Code Download 2006
- An ESB Implementation for Airport Environment 2006
- Way Adaptable D-Nuca Cache 2006
- Analysis of Static and Dynamic Energy Consumption in NUCA Caches: Initial Results 2007
- Effects of Increasing Users' Attention on Cost in Software Download Interfaces on the Internet 2007
- Evaluating Power Consumption of D-Nuca Caches 2007
- Reconfigurable Split Data Caches: A Novel Scheme for Embedded Systems 2007
- Techniques for Reducing Power Consumption in CMP NUCA Caches 2007
- A CMP L2 NUCA Cache Power Reduction Technique 2008
- A Dynamic Optimization Technique for D-NUCA Caches 2008
- A Micro-Architectural Power-Saving Technique for D-NUCA caches 2008
- CMP L2 NUCA Cache Energy Consumption Model 2008
- Facing the False Miss problem in D-NUCA based CMP systems 2008
- Implementation Issues of Way Adaptable D-NUCA Caches 2008
- Investigating Design Tradeoff in CMP Systems 2008
- Leveraging Data Promotion for Low Power D-NUCA Caches 2008
- NUCA caches: Analysis of Performance Sensitivity to NOC Parameters 2008
- On-Chip Networks: Impact on the Performance of NUCA caches 2008
- Performance Sensitivity of NUCA Caches to On-Chip Network Parameters 2008
- Relating GSR Signals to traditional Usability Metrics: A Case Study with an anthropomorphic Web Assistant 2008
- A Power-Efficient Migration Mechanism for D-NUCA Caches 2009
- An Evaluation of Behaviors of S-NUCA CMPs Running Scientific Workload 2009
- Analysis of Performance dependencies in NUCA-based CMP systems 2009
- Investigating Design Trade-Off in S-NUCA based CMP Systems 2009
- Reducing Sensitivity to NoC Latency in NUCA Caches 2009
- CTS: a CMS for Web avatars animated with TTS voices 2010
- Feedback Driven Restructuring of Multi-Threaded Applications for NUCA Cache Performance in CMPs 2010
- Hardware Architectures to Support real-time NURBS Interpolation 2010
- NURBS interpolator with confined chord error and tangential and centripetal acceleration control 2010
- Re-Nuca: Boosting CMP performances through block replication 2010
- Energy Behaviour of NUCA caches in CMPs 2011
- Integration of Existing IEC 61131-3 Systems in an IEC 61499 Distributed Solution 2012
- Capitoli, Parte,Saggi, Studi, Articoli in libro
- Encyclopedia of Portal Technology and Applications - Modelling Public Administration Portals: Requirements, Methodologies and Tools to improve the User Experience 2007
- La Comunicazione nella Pubblica Amministrazione: Un Progetto per l'Usabilità dei Siti Web - Comunicazione e Processi di Formazione. Un Approccio Interdisciplinare 2009
- Encyclopedia of Parallel Computing - NUMA Caches 2011
- Edizioni, Recensioni, Curatele, Voci enc
- ACM SIGARCH Computer Architecture News - Special Issue: Medea 2002 Workshop 2003
- Proceedings of the MEDEA02 Workshop 2003
- ACM SIGARCH Computer Architecture News - Special Issue: Medea 2003 Workshop 2004
- Proceedings of the MEDEA03 Workshop 2004
- ACM SIGARCH Computer Architecture News - Special Issue: Medea 2004 Workshop 2005
- Proceedings of the MEDEA04 Workshop 2005
- ACM SIGARCH Computer Architecture News - Special Issue: Medea 2005 Workshop 2006
- Journal of Embedded Computing - Special Issue on Embedded Processors and Systems: Architectural Issues and Solutions for Emerging Applications 2006
- Proceedings of the ACM MEDEA 2006 Workshop 2006
- Proceedings of the MEDEA05 Workshop 2006
- ACM SIGARCH Computer Architecture News - Special Issue: Medea 2006 Workshop 2007
- Proceedings of the ACM MEDEA 2007 Workshop 2007
- Proceedings of the ACM MEDEA 2008 Workshop 2008
- Proceedings of the ACM MEDEA 2009 Workshop 2009
- High Performance Embedded Architectures and Compilers 5th International Conference, HiPEAC 2010, Pisa, Italy, January 25-27, 2010. Proceedings 2010
- Transactions on HiPEAC III 2011
- Prodotti multimediali o Ideatori di prodotti multimediali
- Rapporti
- ACA IP SARC project N. 27648 Deliverable D2.1 - Report on tolerance and latency reduction 2007
- ACA IP SARC project N. 27648 Deliverable D8.2 - Training Activities Evaluation Report and program for the period 2007
- Hipeac Network of Excellence N. IST-004408 Deliverable D3.a - Report on Research Results. 2007
- ACA IP SARC project N. 27648 Deliverable D2.4 Report on SARC memory System design concepts 2008
- ACA IP SARC project N. 27648 Deliverable D8.3 -Training and Dissemination Activities Report 2008
- Hipeac Network of Excellence N. IST-004408 Deliverable D3.b - Report on Research Results. Cluster 1150 - Adaptable Computers for Embedded Applications 2008
- Hipeac Network of Excellence N. IST-004408 Deliverable D3.b - Report on Research Results. Cluster 442 - Adaptable Computers for Embedded Applications 2 2008
- Hipeac Network of Excellence N. IST-004408 Deliverable D3.b - Report on Research Results. NoC characterization and deployment in mono and multiprocessor systems 2008
- ACA IP SARC project N. 27648 Deliverable D2.5 Report on Performance and Power Efficiency of the SARC Memory System 2009
- ACA IP SARC project N. 27648 Deliverable D8.4 -Training and Dissemination Activities Report 2009
- D2.6 Report on SARC Memory System 2010
- D8.5 Training and Dissemination Activities Report 2010